The present invention relates to a ferroelectric memory device.
As a ferroelectric memory device, an active ferroelectric memory device including 1T/1C cells in which one transistor and one capacitor (ferroelectric) are disposed in each memory cell, or including 2T/2C cells in which a reference cell is further disposed in each memory cell, has been known.
However, since the active ferroelectric memory device has a large memory area in comparison with a flash memory or EEPROM which is known as a nonvolatile memory device in which a memory cell is formed by one element, the capacity cannot be increased.
A ferroelectric memory device in which each memory cell is formed by one ferroelectric capacitor is known (Japanese Patent Application Laid-open No. 9-116107). Japanese Patent Application Laid-open No. 9-116107 discloses hierarchization of bitlines. Specifically, a plurality of sub-bitlines subordinate to one main bitline through a plurality of connection means are provided. One main bitline can be connected with one sub-bitline selected by turning on only one of the connection means. This prevents a voltage from being applied to the unselected memory cells connected with other sub-bitlines, whereby the number of disturbances applied to the unselected memory cells can be limited.
However, the sub-bitline connected with the connection means which is turned off is in a floating state. In this case, the interconnect potential may be changed if noise is applied from the outside, whereby data stored in the ferroelectric capacitors connected with the sub-bitline may be destroyed.
Japanese Patent Application Laid-open No. 7-235648 discloses a ferroelectric memory device which includes a plurality of blocks divided in units of sub-bitlines in the same manner as described above and in which each of the blocks is further divided into a plurality of sub-blocks. The block selected from among the plurality of blocks (selected block) is divided into a selected sub-block and an unselected sub-block. In the selected block, the sub-bitlines do not float in the selected sub-block and the unselected sub-block.
However, the potential of the sub-bitlines is in a floating state in all the unselected sub-blocks in the unselected blocks.